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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-12-02 18:49:00 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-12-13 20:26:02 +0100
commit17c2c320f3c216f80c2fad1f0fa9358c2ffbd0d3 (patch)
treecd5bd83fc8738fae872942478003ac6baf5e7f4c /hw/mips
parent585c80ad7bb1bfd62721d03b62424fb1a786f659 (diff)
target/mips: Introduce ase_mt_available() helper
Instead of accessing CP0_Config3 directly and checking the 'Multi-Threading Present' bit, introduce an helper to simplify code review. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201204222622.2743175-3-f4bug@amsat.org>
Diffstat (limited to 'hw/mips')
-rw-r--r--hw/mips/cps.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index 962b1b0b87..7a0d289efa 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -58,8 +58,7 @@ static void main_cpu_reset(void *opaque)
static bool cpu_mips_itu_supported(CPUMIPSState *env)
{
- bool is_mt = (env->CP0_Config5 & (1 << CP0C5_VP)) ||
- (env->CP0_Config3 & (1 << CP0C3_MT));
+ bool is_mt = (env->CP0_Config5 & (1 << CP0C5_VP)) || ase_mt_available(env);
return is_mt && !kvm_enabled();
}