diff options
| author | Peter Xu <peterx@redhat.com> | 2016-07-31 22:18:05 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2016-08-03 18:44:57 +0200 |
| commit | f99b86b94987561580a94838766458e1c7b8685d (patch) | |
| tree | 2ec96d3d57f4d841e2956b5b9bf8cb75c7092fad /hw/intc | |
| parent | 7298d4fd515c190b1b6c1266735f6212300313ae (diff) | |
x86: ioapic: ignore level irq during processing
For level triggered interrupts, we will get Remote IRR bit cleared after
guest kernel finished processing specific request. Before that, we
should ignore the same interrupt from triggering again.
Signed-off-by: Peter Xu <peterx@redhat.com>
Message-Id: <1469974685-4144-1-git-send-email-peterx@redhat.com>
[Push new "if" up so that it covers KVM split irqchip as well. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/intc')
| -rw-r--r-- | hw/intc/ioapic.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index 2d3282a864..a00d88210a 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -117,21 +117,25 @@ static void ioapic_service(IOAPICCommonState *s) s->ioredtbl[i] |= IOAPIC_LVT_REMOTE_IRR; } + if (coalesce) { + /* We are level triggered interrupts, and the + * guest should be still working on previous one, + * so skip it. */ + continue; + } + #ifdef CONFIG_KVM if (kvm_irqchip_is_split()) { if (info.trig_mode == IOAPIC_TRIGGER_EDGE) { kvm_set_irq(kvm_state, i, 1); kvm_set_irq(kvm_state, i, 0); } else { - if (!coalesce) { - kvm_set_irq(kvm_state, i, 1); - } + kvm_set_irq(kvm_state, i, 1); } continue; } -#else - (void)coalesce; #endif + /* No matter whether IR is enabled, we translate * the IOAPIC message into a MSI one, and its * address space will decide whether we need a |