diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2023-09-13 17:22:49 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-10-04 11:03:54 -0700 |
| commit | b77af26e973705e8fd96cff102fc978ee44043da (patch) | |
| tree | 5da84b6520fbcf44ef8d9af06307785744eef835 /hw/intc | |
| parent | ad75a51e84af9638e4ec51aa1e6ec5f3ff642558 (diff) | |
accel/tcg: Replace CPUState.env_ptr with cpu_env()
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/intc')
| -rw-r--r-- | hw/intc/mips_gic.c | 2 | ||||
| -rw-r--r-- | hw/intc/riscv_aclint.c | 12 | ||||
| -rw-r--r-- | hw/intc/riscv_imsic.c | 2 |
3 files changed, 8 insertions, 8 deletions
diff --git a/hw/intc/mips_gic.c b/hw/intc/mips_gic.c index 4bdc3b1bd1..77ba7348a3 100644 --- a/hw/intc/mips_gic.c +++ b/hw/intc/mips_gic.c @@ -423,7 +423,7 @@ static void mips_gic_realize(DeviceState *dev, Error **errp) /* Register the env for all VPs with the GIC */ for (i = 0; i < s->num_vps; i++) { if (cs != NULL) { - s->vps[i].env = cs->env_ptr; + s->vps[i].env = cpu_env(cs); cs = CPU_NEXT(cs); } else { error_setg(errp, diff --git a/hw/intc/riscv_aclint.c b/hw/intc/riscv_aclint.c index 25cf7a5d9d..ab1a0b4b3a 100644 --- a/hw/intc/riscv_aclint.c +++ b/hw/intc/riscv_aclint.c @@ -131,7 +131,7 @@ static uint64_t riscv_aclint_mtimer_read(void *opaque, hwaddr addr, size_t hartid = mtimer->hartid_base + ((addr - mtimer->timecmp_base) >> 3); CPUState *cpu = cpu_by_arch_id(hartid); - CPURISCVState *env = cpu ? cpu->env_ptr : NULL; + CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; if (!env) { qemu_log_mask(LOG_GUEST_ERROR, "aclint-mtimer: invalid hartid: %zu", hartid); @@ -174,7 +174,7 @@ static void riscv_aclint_mtimer_write(void *opaque, hwaddr addr, size_t hartid = mtimer->hartid_base + ((addr - mtimer->timecmp_base) >> 3); CPUState *cpu = cpu_by_arch_id(hartid); - CPURISCVState *env = cpu ? cpu->env_ptr : NULL; + CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; if (!env) { qemu_log_mask(LOG_GUEST_ERROR, "aclint-mtimer: invalid hartid: %zu", hartid); @@ -233,7 +233,7 @@ static void riscv_aclint_mtimer_write(void *opaque, hwaddr addr, /* Check if timer interrupt is triggered for each hart. */ for (i = 0; i < mtimer->num_harts; i++) { CPUState *cpu = cpu_by_arch_id(mtimer->hartid_base + i); - CPURISCVState *env = cpu ? cpu->env_ptr : NULL; + CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; if (!env) { continue; } @@ -375,7 +375,7 @@ DeviceState *riscv_aclint_mtimer_create(hwaddr addr, hwaddr size, for (i = 0; i < num_harts; i++) { CPUState *cpu = cpu_by_arch_id(hartid_base + i); RISCVCPU *rvcpu = RISCV_CPU(cpu); - CPURISCVState *env = cpu ? cpu->env_ptr : NULL; + CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; riscv_aclint_mtimer_callback *cb = g_new0(riscv_aclint_mtimer_callback, 1); @@ -409,7 +409,7 @@ static uint64_t riscv_aclint_swi_read(void *opaque, hwaddr addr, if (addr < (swi->num_harts << 2)) { size_t hartid = swi->hartid_base + (addr >> 2); CPUState *cpu = cpu_by_arch_id(hartid); - CPURISCVState *env = cpu ? cpu->env_ptr : NULL; + CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; if (!env) { qemu_log_mask(LOG_GUEST_ERROR, "aclint-swi: invalid hartid: %zu", hartid); @@ -432,7 +432,7 @@ static void riscv_aclint_swi_write(void *opaque, hwaddr addr, uint64_t value, if (addr < (swi->num_harts << 2)) { size_t hartid = swi->hartid_base + (addr >> 2); CPUState *cpu = cpu_by_arch_id(hartid); - CPURISCVState *env = cpu ? cpu->env_ptr : NULL; + CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; if (!env) { qemu_log_mask(LOG_GUEST_ERROR, "aclint-swi: invalid hartid: %zu", hartid); diff --git a/hw/intc/riscv_imsic.c b/hw/intc/riscv_imsic.c index 760dbddcf7..b31d07980c 100644 --- a/hw/intc/riscv_imsic.c +++ b/hw/intc/riscv_imsic.c @@ -333,7 +333,7 @@ static void riscv_imsic_realize(DeviceState *dev, Error **errp) RISCVIMSICState *imsic = RISCV_IMSIC(dev); RISCVCPU *rcpu = RISCV_CPU(cpu_by_arch_id(imsic->hartid)); CPUState *cpu = cpu_by_arch_id(imsic->hartid); - CPURISCVState *env = cpu ? cpu->env_ptr : NULL; + CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; if (!kvm_irqchip_in_kernel()) { imsic->num_eistate = imsic->num_pages * imsic->num_irqs; |