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authorSai Pavan Boddu <sai.pavan.boddu@xilinx.com>2020-02-24 15:09:24 +0530
committerPeter Maydell <peter.maydell@linaro.org>2020-02-28 16:14:57 +0000
commit25f1d9f38bac040498814561714b794431af86c4 (patch)
tree595b26e642a6e983467160b41dcb375fdf56a4af /hw/cpu
parentb3df30ad2cf8f7e313a14d5073051cf59c06e9ed (diff)
cpu/arm11mpcore: Set number of GIC priority bits to 4
The GIC built into the ARM11MPCore is always implemented with 4 priority bits; set the GIC property accordingly. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1582537164-764-4-git-send-email-sai.pavan.boddu@xilinx.com Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: tweaked commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/cpu')
-rw-r--r--hw/cpu/arm11mpcore.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c
index 2e3e87cc1b..ab9fadb67c 100644
--- a/hw/cpu/arm11mpcore.c
+++ b/hw/cpu/arm11mpcore.c
@@ -15,6 +15,7 @@
#include "hw/irq.h"
#include "hw/qdev-properties.h"
+#define ARM11MPCORE_NUM_GIC_PRIORITY_BITS 4
static void mpcore_priv_set_irq(void *opaque, int irq, int level)
{
@@ -86,6 +87,10 @@ static void mpcore_priv_realize(DeviceState *dev, Error **errp)
qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu);
qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq);
+ qdev_prop_set_uint32(gicdev, "num-priority-bits",
+ ARM11MPCORE_NUM_GIC_PRIORITY_BITS);
+
+
object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
if (err != NULL) {
error_propagate(errp, err);