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| author | Aurelien Jarno <aurelien@aurel32.net> | 2013-04-15 22:51:32 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2013-04-15 22:51:32 +0200 |
| commit | e0e367bad7170e264916cdcba4306f79f47bb95c (patch) | |
| tree | 96274959ec204bdc7ebb0cb64bec01bd774612a0 /hw/core | |
| parent | e6b636779b51c97e67694be740ee972c52460c59 (diff) | |
| parent | 39dc85b98561ea3de2b029f43a3a2db95c57afa3 (diff) | |
Merge branch 'tcg-ppc64' of git://github.com/rth7680/qemu
* 'tcg-ppc64' of git://github.com/rth7680/qemu: (33 commits)
tcg-ppc64: Handle deposit of zero
tcg-ppc64: Implement mulu2/muls2_i64
tcg-ppc64: Implement add2/sub2_i64
tcg-ppc64: Use getauxval for ISA detection
tcg-ppc64: Implement movcond
tcg-ppc64: Use ISEL for setcond
tcg-ppc64: Use MFOCRF instead of MFCR
tcg-ppc64: Cleanup i32 constants to tcg_out_cmp
tcg-ppc64: Use TCGType throughout compares
tcg-ppc64: Use I constraint for mul
tcg-ppc64: Implement deposit
tcg-ppc64: Handle constant inputs for some compound logicals
tcg-ppc64: Implement compound logicals
tcg-ppc64: Implement bswap64
tcg-ppc64: Implement bswap16 and bswap32
tcg-ppc64: Implement rotates
tcg-ppc64: Streamline qemu_ld/st insn selection
tcg-ppc64: Use automatic implementation of ext32u_i64
tcg-ppc64: Improve and_i64 with constant
tcg-ppc64: Improve and_i32 with constant
...
Diffstat (limited to 'hw/core')
0 files changed, 0 insertions, 0 deletions