diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2012-03-14 15:37:53 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-03-16 18:09:55 +0000 |
| commit | 0e4a398ab2c5e9b540a80859ec28163b65e7a891 (patch) | |
| tree | d82d2b3d85816bce616ec40325ebd49be3de9c6b /hw/arm11mpcore.c | |
| parent | 54e17933bf78cdbbeb0f12b2db38f210c2a992d4 (diff) | |
ARM: Remove unnecessary subpage workarounds
In the ARM per-CPU peripherals (GIC, private timers, SCU, etc),
remove workarounds for subpage memory region read/write functions
being passed offsets from the start of the page rather than the
start of the region. Following commit 5312bd8b3 the masking off
of high bits of the address offset is now harmless but unnecessary.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/arm11mpcore.c')
| -rw-r--r-- | hw/arm11mpcore.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/hw/arm11mpcore.c b/hw/arm11mpcore.c index c67b70f3b9..ba6a89d3ed 100644 --- a/hw/arm11mpcore.c +++ b/hw/arm11mpcore.c @@ -42,7 +42,6 @@ static uint64_t mpcore_scu_read(void *opaque, target_phys_addr_t offset, { mpcore_priv_state *s = (mpcore_priv_state *)opaque; int id; - offset &= 0xff; /* SCU */ switch (offset) { case 0x00: /* Control. */ @@ -63,7 +62,6 @@ static void mpcore_scu_write(void *opaque, target_phys_addr_t offset, uint64_t value, unsigned size) { mpcore_priv_state *s = (mpcore_priv_state *)opaque; - offset &= 0xff; /* SCU */ switch (offset) { case 0: /* Control register. */ |