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authorPeter Maydell <peter.maydell@linaro.org>2022-12-14 14:27:10 +0000
committerPeter Maydell <peter.maydell@linaro.org>2022-12-15 11:18:20 +0000
commit3c1a7c41972f92aa24cdb43e241f60e1d332bd26 (patch)
tree67767b5ce7fccd775df29c3ef03459cbf3e28bc5 /hw/arm/smmu-common.c
parent41654f120f535545baf91198699392376d995837 (diff)
hw/arm: Convert TYPE_ARM_SMMU to 3-phase reset
Convert the TYPE_ARM_SMMU device to 3-phase reset. The legacy method doesn't do anything that's invalid in the hold phase, so the conversion is simple and not a behaviour change. Note that we must convert this base class before we can convert the TYPE_ARM_SMMUV3 subclass -- transitional support in Resettable handles "chain to parent class reset" when the base class is 3-phase and the subclass is still using legacy reset, but not the other way around. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20221109161444.3397405-2-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm/smmu-common.c')
-rw-r--r--hw/arm/smmu-common.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
index e09b9c13b7..220838525d 100644
--- a/hw/arm/smmu-common.c
+++ b/hw/arm/smmu-common.c
@@ -526,9 +526,9 @@ static void smmu_base_realize(DeviceState *dev, Error **errp)
}
}
-static void smmu_base_reset(DeviceState *dev)
+static void smmu_base_reset_hold(Object *obj)
{
- SMMUState *s = ARM_SMMU(dev);
+ SMMUState *s = ARM_SMMU(obj);
g_hash_table_remove_all(s->configs);
g_hash_table_remove_all(s->iotlb);
@@ -543,12 +543,13 @@ static Property smmu_dev_properties[] = {
static void smmu_base_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
SMMUBaseClass *sbc = ARM_SMMU_CLASS(klass);
device_class_set_props(dc, smmu_dev_properties);
device_class_set_parent_realize(dc, smmu_base_realize,
&sbc->parent_realize);
- dc->reset = smmu_base_reset;
+ rc->phases.hold = smmu_base_reset_hold;
}
static const TypeInfo smmu_base_info = {