diff options
| author | Alistair Francis <alistair.francis@xilinx.com> | 2017-11-08 14:56:31 -0800 |
|---|---|---|
| committer | Thomas Huth <thuth@redhat.com> | 2018-01-22 09:46:18 +0100 |
| commit | a89f364ae8740dfc31b321eed9ee454e996dc3c1 (patch) | |
| tree | 76f90b17f8fc0252142de0b61dd8a18d5a8bcf4d /hw/arm/omap2.c | |
| parent | 7d8b00fa5680152913405d045e861bb918f16017 (diff) | |
Replace all occurances of __FUNCTION__ with __func__
Replace all occurs of __FUNCTION__ except for the check in checkpatch
with the non GCC specific __func__.
One line in hcd-musb.c was manually tweaked to pass checkpatch.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
[THH: Removed hunks related to pxa2xx_mmci.c (fixed already)]
Signed-off-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'hw/arm/omap2.c')
| -rw-r--r-- | hw/arm/omap2.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index f5b148881c..b53878b8b9 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -1312,7 +1312,7 @@ static void omap_prcm_apll_update(struct omap_prcm_s *s) if (mode[0] == 1 || mode[0] == 2 || mode[1] == 1 || mode[1] == 2) fprintf(stderr, "%s: bad EN_54M_PLL or bad EN_96M_PLL\n", - __FUNCTION__); + __func__); } static void omap_prcm_dpll_update(struct omap_prcm_s *s) @@ -1331,7 +1331,7 @@ static void omap_prcm_dpll_update(struct omap_prcm_s *s) s->dpll_lock = 0; switch (mode) { case 0: - fprintf(stderr, "%s: bad EN_DPLL\n", __FUNCTION__); + fprintf(stderr, "%s: bad EN_DPLL\n", __func__); break; case 1: /* Low-power bypass mode (Default) */ case 2: /* Fast-relock bypass mode */ @@ -1358,7 +1358,7 @@ static void omap_prcm_dpll_update(struct omap_prcm_s *s) omap_clk_reparent(core, dpll_x2); break; case 3: - fprintf(stderr, "%s: bad CORE_CLK_SRC\n", __FUNCTION__); + fprintf(stderr, "%s: bad CORE_CLK_SRC\n", __func__); break; } } @@ -1628,7 +1628,7 @@ static void omap_prcm_write(void *opaque, hwaddr addr, case 0x500: /* CM_CLKEN_PLL */ if (value & 0xffffff30) fprintf(stderr, "%s: write 0s in CM_CLKEN_PLL for " - "future compatibility\n", __FUNCTION__); + "future compatibility\n", __func__); if ((s->clken[9] ^ value) & 0xcc) { s->clken[9] &= ~0xcc; s->clken[9] |= value & 0xcc; @@ -1647,7 +1647,7 @@ static void omap_prcm_write(void *opaque, hwaddr addr, case 0x540: /* CM_CLKSEL1_PLL */ if (value & 0xfc4000d7) fprintf(stderr, "%s: write 0s in CM_CLKSEL1_PLL for " - "future compatibility\n", __FUNCTION__); + "future compatibility\n", __func__); if ((s->clksel[5] ^ value) & 0x003fff00) { s->clksel[5] = value & 0x03bfff28; omap_prcm_dpll_update(s); @@ -1659,7 +1659,7 @@ static void omap_prcm_write(void *opaque, hwaddr addr, case 0x544: /* CM_CLKSEL2_PLL */ if (value & ~3) fprintf(stderr, "%s: write 0s in CM_CLKSEL2_PLL[31:2] for " - "future compatibility\n", __FUNCTION__); + "future compatibility\n", __func__); if (s->clksel[6] != (value & 3)) { s->clksel[6] = value & 3; omap_prcm_dpll_update(s); |