diff options
author | Andreas Färber <afaerber@suse.de> | 2013-05-27 06:49:53 +0200 |
---|---|---|
committer | Andreas Färber <afaerber@suse.de> | 2013-06-28 13:25:13 +0200 |
commit | c658b94f6e8c206c59d02aa6fbac285b86b53d2c (patch) | |
tree | 100efd8e543a576daa8d7dc6684ce1154ea08245 /hw/alpha | |
parent | ce927ed9e40e25008453eb8f130661514b633341 (diff) |
cpu: Turn cpu_unassigned_access() into a CPUState hook
Use it for all targets, but be careful not to pass invalid CPUState.
cpu_single_env can be NULL, e.g. on Xen.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/alpha')
-rw-r--r-- | hw/alpha/typhoon.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 1ead1877c7..207dcad2a3 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -197,7 +197,8 @@ static uint64_t cchip_read(void *opaque, hwaddr addr, unsigned size) break; default: - cpu_unassigned_access(cpu_single_env, addr, 0, 0, 0, size); + cpu = CPU(alpha_env_get_cpu(cpu_single_env)); + cpu_unassigned_access(cpu, addr, false, false, 0, size); return -1; } @@ -214,6 +215,7 @@ static uint64_t dchip_read(void *opaque, hwaddr addr, unsigned size) static uint64_t pchip_read(void *opaque, hwaddr addr, unsigned size) { TyphoonState *s = opaque; + CPUState *cs; uint64_t ret = 0; if (addr & 4) { @@ -300,7 +302,8 @@ static uint64_t pchip_read(void *opaque, hwaddr addr, unsigned size) break; default: - cpu_unassigned_access(cpu_single_env, addr, 0, 0, 0, size); + cs = CPU(alpha_env_get_cpu(cpu_single_env)); + cpu_unassigned_access(cs, addr, false, false, 0, size); return -1; } @@ -312,6 +315,7 @@ static void cchip_write(void *opaque, hwaddr addr, uint64_t v32, unsigned size) { TyphoonState *s = opaque; + CPUState *cpu_single_cpu = CPU(alpha_env_get_cpu(cpu_single_env)); uint64_t val, oldval, newval; if (addr & 4) { @@ -461,7 +465,7 @@ static void cchip_write(void *opaque, hwaddr addr, break; default: - cpu_unassigned_access(cpu_single_env, addr, 1, 0, 0, size); + cpu_unassigned_access(cpu_single_cpu, addr, true, false, 0, size); return; } } @@ -476,6 +480,7 @@ static void pchip_write(void *opaque, hwaddr addr, uint64_t v32, unsigned size) { TyphoonState *s = opaque; + CPUState *cs; uint64_t val, oldval; if (addr & 4) { @@ -577,7 +582,8 @@ static void pchip_write(void *opaque, hwaddr addr, break; default: - cpu_unassigned_access(cpu_single_env, addr, 1, 0, 0, size); + cs = CPU(alpha_env_get_cpu(cpu_single_env)); + cpu_unassigned_access(cs, addr, true, false, 0, size); return; } } |