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authorPeter Maydell <peter.maydell@linaro.org>2017-07-11 11:21:26 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-07-11 11:21:26 +0100
commit792dac309c8660306557ba058b8b5a6a75ab3c1f (patch)
treec6448caf17db30d783454f82dfe09a99ba07baed /hmp.c
parent5d721b785fbe80170fc756e9444cf751d3a47568 (diff)
target-arm: v7M: ignore writes to CONTROL.SPSEL from Thread mode
For v7M, writes to the CONTROL register are only permitted for privileged code. However even if the code is privileged, the write must not affect the SPSEL bit in the CONTROL register if the CPU is in Thread mode (as documented in the pseudocode for the MSR instruction). Implement this, instead of permitting SPSEL to be written in all cases. This was causing mbed applications not to run, because the RTX RTOS they use relies on this behaviour. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1498820791-8130-1-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'hmp.c')
0 files changed, 0 insertions, 0 deletions