diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2018-05-10 12:45:29 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2018-05-17 15:24:19 -0700 |
| commit | 298b468e4389587ab2e8599dd33eff3fbc698011 (patch) | |
| tree | b3a86067108a1bdf1e7a8d6114d9e68c2338de91 /fpu | |
| parent | 94933df0e5c34d1a50fc950553f9c9649cae5320 (diff) | |
fpu/softfloat: Introduce parts_is_snan_frac
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'fpu')
| -rw-r--r-- | fpu/softfloat-specialize.h | 15 | ||||
| -rw-r--r-- | fpu/softfloat.c | 12 |
2 files changed, 17 insertions, 10 deletions
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 4fc9ea4ac0..515cb12cfa 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -87,6 +87,21 @@ this code that are retained. #endif /*---------------------------------------------------------------------------- +| For the deconstructed floating-point with fraction FRAC, return true +| if the fraction represents a signalling NaN; otherwise false. +*----------------------------------------------------------------------------*/ + +static bool parts_is_snan_frac(uint64_t frac, float_status *status) +{ +#ifdef NO_SIGNALING_NANS + return false; +#else + flag msb = extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); + return msb == status->snan_bit_is_one; +#endif +} + +/*---------------------------------------------------------------------------- | The pattern for a default generated half-precision NaN. *----------------------------------------------------------------------------*/ float16 float16_default_nan(float_status *status) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 607c4a78d5..19f40d6932 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -331,16 +331,8 @@ static FloatParts canonicalize(FloatParts part, const FloatFmt *parm, part.cls = float_class_inf; } else { part.frac <<= parm->frac_shift; -#ifdef NO_SIGNALING_NANS - part.cls = float_class_qnan; -#else - int64_t msb = part.frac << 2; - if ((msb < 0) == status->snan_bit_is_one) { - part.cls = float_class_snan; - } else { - part.cls = float_class_qnan; - } -#endif + part.cls = (parts_is_snan_frac(part.frac, status) + ? float_class_snan : float_class_qnan); } } else if (part.exp == 0) { if (likely(part.frac == 0)) { |