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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-19 23:59:38 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-19 23:59:38 +0000
commit811d4cf4b08ba141b7f9c3481c5ab50d47123499 (patch)
treeaa174f098eb3d5eddfea16a57934702b4c1109a5 /exec-all.h
parent6b4c11cd8ee746c2da2de7c1b77cb932c93e5463 (diff)
ARM host support for TCG targets.
Updated from previous version to use the tcg prologue/epilogue mechanism, may be slower than direct call. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4500 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'exec-all.h')
-rw-r--r--exec-all.h18
1 files changed, 17 insertions, 1 deletions
diff --git a/exec-all.h b/exec-all.h
index d8c6c3371e..51b27b5141 100644
--- a/exec-all.h
+++ b/exec-all.h
@@ -142,7 +142,7 @@ static inline int tlb_set_page(CPUState *env1, target_ulong vaddr,
#define CODE_GEN_MAX_BLOCKS (CODE_GEN_BUFFER_SIZE / CODE_GEN_AVG_BLOCK_SIZE)
-#if defined(__powerpc__) || defined(__x86_64__)
+#if defined(__powerpc__) || defined(__x86_64__) || defined(__arm__)
#define USE_DIRECT_JUMP
#endif
#if defined(__i386__) && !defined(_WIN32)
@@ -240,6 +240,22 @@ static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr
*(uint32_t *)jmp_addr = addr - (jmp_addr + 4);
/* no need to flush icache explicitely */
}
+#elif defined(__arm__)
+static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)
+{
+ register unsigned long _beg __asm ("a1");
+ register unsigned long _end __asm ("a2");
+ register unsigned long _flg __asm ("a3");
+
+ /* we could use a ldr pc, [pc, #-4] kind of branch and avoid the flush */
+ *(uint32_t *)jmp_addr |= ((addr - (jmp_addr + 8)) >> 2) & 0xffffff;
+
+ /* flush icache */
+ _beg = jmp_addr;
+ _end = jmp_addr + 4;
+ _flg = 0;
+ __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
+}
#endif
static inline void tb_set_jmp_target(TranslationBlock *tb,