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authorPeter Maydell <peter.maydell@linaro.org>2020-09-03 21:20:47 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-09-14 14:23:19 +0100
commit6d4811c4b688de368748c8095250ba12c905a21c (patch)
treebf710de83157944428a2b789510b01d1dc11f3e5 /docs
parent897d27260a7eaccbf4ff01e49021205c5616c8ef (diff)
hw/arm/mps2: New board model mps2-an500
Implement a model of the MPS2 with the AN500 firmware. This is similar to the AN385, with the following differences: * Cortex-M7 CPU * PSRAM is at 0x6000_0000 * Ethernet is at 0xa000_0000 * No zbt_boot_ctrl remapping of the low 16K (but QEMU doesn't implement this anyway) * no "block RAM" at 0x01000000 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200903202048.15370-3-peter.maydell@linaro.org
Diffstat (limited to 'docs')
-rw-r--r--docs/system/arm/mps2.rst6
1 files changed, 4 insertions, 2 deletions
diff --git a/docs/system/arm/mps2.rst b/docs/system/arm/mps2.rst
index e680a4ceb7..7f2e9c8d52 100644
--- a/docs/system/arm/mps2.rst
+++ b/docs/system/arm/mps2.rst
@@ -1,5 +1,5 @@
-Arm MPS2 boards (``mps2-an385``, ``mps2-an386``, ``mps2-an505``, ``mps2-an511``, ``mps2-an521``)
-================================================================================================
+Arm MPS2 boards (``mps2-an385``, ``mps2-an386``, ``mps2-an500``, ``mps2-an505``, ``mps2-an511``, ``mps2-an521``)
+================================================================================================================
These board models all use Arm M-profile CPUs.
@@ -14,6 +14,8 @@ QEMU models the following FPGA images:
Cortex-M3 as documented in ARM Application Note AN385
``mps2-an386``
Cortex-M4 as documented in ARM Application Note AN386
+``mps2-an500``
+ Cortex-M7 as documented in ARM Application Note AN500
``mps2-an511``
Cortex-M3 'DesignStart' as documented in AN511
``mps2-an505``