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| author | Stefan Hajnoczi <stefanha@redhat.com> | 2023-08-24 09:17:05 -0400 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2023-08-24 09:17:05 -0400 |
| commit | 6030ef9d416d740eed9c0beaf7eef83d27eaf4eb (patch) | |
| tree | 18bb2d7fc4bf79934885d8dad843c1164ed80504 /bsd-user/signal.c | |
| parent | 92e1d39f989771f9fc190234111863c7376487c5 (diff) | |
| parent | 3f6bec4a9f7c159d32d49f6df5c2c3d587b953b9 (diff) | |
Merge tag 'pull-loongarch-20230824' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20230824
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* tag 'pull-loongarch-20230824' of https://gitlab.com/gaosong/qemu: (31 commits)
hw/loongarch: Fix ACPI processor id off-by-one error
target/loongarch: Split fcc register to fcc0-7 in gdbstub
hw/intc/loongarch_pch: fix edge triggered irq handling
target/loongarch: cpu: Implement get_arch_id callback
target/loongarch: Add avail_IOCSR to check iocsr instructions
target/loongarch: Add avail_LSX to check LSX instructions
target/loongarch: Add avail_LAM to check atomic instructions
target/loongarch: Add avail_LSPW to check LSPW instructions
target/loongarch: Add avail_FP/FP_SP/FP_DP to check fpu instructions
hw/loongarch: Remove restriction of la464 cores in the virt machine
target/loongarch: Add LoongArch32 cpu la132
target/loongarch: Add avail_64 to check la64-only instructions
target/loongarch: Add a check parameter to the TRANS macro
target/loongarch: Sign extend results in VA32 mode
target/loongarch: Truncate high 32 bits of address in VA32 mode
target/loongarch: Extract set_pc() helper
target/loongarch: Extract make_address_pc() helper
target/loongarch: Extract make_address_i() helper
target/loongarch: Extract make_address_x() helper
target/loongarch: Add LA64 & VA32 to DisasContext
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'bsd-user/signal.c')
0 files changed, 0 insertions, 0 deletions