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author | Max Filippov <jcmvbkbc@gmail.com> | 2011-09-06 03:55:44 +0400 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2011-09-10 16:57:39 +0000 |
commit | 797d780b1375b1af1d7713685589bfdec9908dc3 (patch) | |
tree | 5636c30b30f9c94ad9359f5b22eebfae38046c91 /Makefile.user | |
parent | 553e44f90645b7f2fc9cec7583844e24cd86019f (diff) |
target-xtensa: implement loop option
See ISA, 4.3.2 for details.
Operations that change LEND SR value invalidate TBs at the old and at
the new LEND. LEND value at TB compilation time is considered constant
and loop instruction is generated based on this value.
Invalidation may be avoided for the TB at the old LEND address, since
looping code verifies actual LEND value.
Invalidation may be avoided for the TB at the new LEND address if
there's a way to associate LEND address with TB at compilation time and
later verify that it doesn't change.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'Makefile.user')
0 files changed, 0 insertions, 0 deletions