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| author | Peter Maydell <peter.maydell@linaro.org> | 2018-08-17 09:46:00 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-08-17 09:46:00 +0100 |
| commit | 0abaa41d936becd914a16ee1fe2a981d96d19428 (patch) | |
| tree | fd3e26a40e1e831e3348cd9afdc203b637fb3e08 /MAINTAINERS | |
| parent | b8f7ff1e10b4d03555d6a5da011c2aae10063ab8 (diff) | |
| parent | 7210a02c58572b2686a3a8d610c6628f87864aed (diff) | |
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging
x86 queue, 2018-08-16
Bug fix:
* Some guests may crash when using "-cpu host" due to TOPOEXT,
disable it by default
Features:
* PV_SEND_IPI feature bit
* Icelake-{Server,Client} CPU models
* New CPUID feature bits: PV_SEND_IPI, WBNOINVD, PCONFIG, ARCH_CAPABILITIES
Documentation:
* docs/qemu-cpu-models.texi
# gpg: Signature made Fri 17 Aug 2018 02:33:09 BST
# gpg: using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/x86-next-pull-request:
i386: Disable TOPOEXT by default on "-cpu host"
target-i386: adds PV_SEND_IPI CPUID feature bit
i386: Add new CPU model Icelake-{Server,Client}
i386: Add CPUID bit for WBNOINVD
i386: Add CPUID bit for PCONFIG
i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR
i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES
docs: add guidance on configuring CPU models for x86
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'MAINTAINERS')
| -rw-r--r-- | MAINTAINERS | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 272a534ca0..70651f7da0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -289,6 +289,7 @@ F: tests/tcg/i386/ F: tests/tcg/x86_64/ F: hw/i386/ F: disas/i386.c +F: docs/qemu-cpu-models.texi T: git git://github.com/ehabkost/qemu.git x86-next Xtensa |