diff options
author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-07-23 22:39:53 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-07-23 22:39:53 +0000 |
commit | a2458627f9d29675ef29d2a3c8c6a3df99bedfb1 (patch) | |
tree | f43a0db2ac1288adebae9b6ef00b19c5745ba27e | |
parent | b1fc0348b1ddc935fca98bddc7ee1c8c64e91f0b (diff) |
ppc64 target
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1523 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r-- | Makefile.target | 11 | ||||
-rwxr-xr-x | configure | 6 | ||||
-rw-r--r-- | dis-asm.h | 18 | ||||
-rw-r--r-- | disas.c | 10 | ||||
-rw-r--r-- | ppc-dis.c | 9 |
5 files changed, 48 insertions, 6 deletions
diff --git a/Makefile.target b/Makefile.target index c5a5152726..9a6b4d724c 100644 --- a/Makefile.target +++ b/Makefile.target @@ -4,6 +4,9 @@ TARGET_BASE_ARCH:=$(TARGET_ARCH) ifeq ($(TARGET_ARCH), x86_64) TARGET_BASE_ARCH:=i386 endif +ifeq ($(TARGET_ARCH), ppc64) +TARGET_BASE_ARCH:=ppc +endif ifeq ($(TARGET_ARCH), sparc64) TARGET_BASE_ARCH:=sparc endif @@ -195,7 +198,7 @@ ifeq ($(TARGET_ARCH), x86_64) LIBOBJS+=helper.o helper2.o endif -ifeq ($(TARGET_ARCH), ppc) +ifeq ($(TARGET_BASE_ARCH), ppc) LIBOBJS+= op_helper.o helper.o endif @@ -225,7 +228,7 @@ endif ifeq ($(findstring alpha, $(TARGET_ARCH) $(ARCH)),alpha) LIBOBJS+=alpha-dis.o endif -ifeq ($(findstring ppc, $(TARGET_ARCH) $(ARCH)),ppc) +ifeq ($(findstring ppc, $(TARGET_BASE_ARCH) $(ARCH)),ppc) LIBOBJS+=ppc-dis.o endif ifeq ($(findstring mips, $(TARGET_ARCH) $(ARCH)),mips) @@ -286,7 +289,7 @@ VL_OBJS+= ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pc.o VL_OBJS+= cirrus_vga.o mixeng.o apic.o parallel.o endif -ifeq ($(TARGET_ARCH), ppc) +ifeq ($(TARGET_BASE_ARCH), ppc) VL_OBJS+= ppc.o ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) VL_OBJS+= mc146818rtc.o serial.o i8259.o i8254.o fdc.o m48t59.o VL_OBJS+= ppc_prep.o ppc_chrp.o cuda.o adb.o openpic.o heathrow_pic.o mixeng.o @@ -400,7 +403,7 @@ op.o: op.c op_template.h op_mem.h fop_template.h fbranch_template.h magic_load.o: elf_op.h endif -ifeq ($(TARGET_ARCH), ppc) +ifeq ($(TARGET_BASE_ARCH), ppc) op.o: op.c op_template.h op_mem.h op_helper.o: op_helper_mem.h translate.o: translate.c translate_init.c @@ -611,6 +611,7 @@ target_bigendian="no" [ "$target_cpu" = "sparc" ] && target_bigendian=yes [ "$target_cpu" = "sparc64" ] && target_bigendian=yes [ "$target_cpu" = "ppc" ] && target_bigendian=yes +[ "$target_cpu" = "ppc64" ] && target_bigendian=yes [ "$target_cpu" = "mips" ] && target_bigendian=yes target_softmmu="no" if expr $target : '.*-softmmu' > /dev/null ; then @@ -676,6 +677,11 @@ elif test "$target_cpu" = "ppc" ; then echo "TARGET_ARCH=ppc" >> $config_mak echo "#define TARGET_ARCH \"ppc\"" >> $config_h echo "#define TARGET_PPC 1" >> $config_h +elif test "$target_cpu" = "ppc64" ; then + echo "TARGET_ARCH=ppc64" >> $config_mak + echo "#define TARGET_ARCH \"ppc64\"" >> $config_h + echo "#define TARGET_PPC 1" >> $config_h + echo "#define TARGET_PPC64 1" >> $config_h elif test "$target_cpu" = "x86_64" ; then echo "TARGET_ARCH=x86_64" >> $config_mak echo "#define TARGET_ARCH \"x86_64\"" >> $config_h @@ -126,6 +126,24 @@ enum bfd_architecture #define bfd_mach_h8300h 2 #define bfd_mach_h8300s 3 bfd_arch_powerpc, /* PowerPC */ +#define bfd_mach_ppc 0 +#define bfd_mach_ppc64 1 +#define bfd_mach_ppc_403 403 +#define bfd_mach_ppc_403gc 4030 +#define bfd_mach_ppc_505 505 +#define bfd_mach_ppc_601 601 +#define bfd_mach_ppc_602 602 +#define bfd_mach_ppc_603 603 +#define bfd_mach_ppc_ec603e 6031 +#define bfd_mach_ppc_604 604 +#define bfd_mach_ppc_620 620 +#define bfd_mach_ppc_630 630 +#define bfd_mach_ppc_750 750 +#define bfd_mach_ppc_860 860 +#define bfd_mach_ppc_a35 35 +#define bfd_mach_ppc_rs64ii 642 +#define bfd_mach_ppc_rs64iii 643 +#define bfd_mach_ppc_7400 7400 bfd_arch_rs6000, /* IBM RS/6000 */ bfd_arch_hppa, /* HP PA RISC */ bfd_arch_d10v, /* Mitsubishi D10V */ @@ -179,6 +179,11 @@ void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) #elif defined(TARGET_PPC) if (cpu_single_env->msr[MSR_LE]) disasm_info.endian = BFD_ENDIAN_LITTLE; +#ifdef TARGET_PPC64 + disasm_info.mach = bfd_mach_ppc64; +#else + disasm_info.mach = bfd_mach_ppc; +#endif print_insn = print_insn_ppc; #elif defined(TARGET_MIPS) print_insn = print_insn_big_mips; @@ -355,6 +360,11 @@ void monitor_disas(target_ulong pc, int nb_insn, int is_physical, int flags) #elif defined(TARGET_SPARC) print_insn = print_insn_sparc; #elif defined(TARGET_PPC) +#ifdef TARGET_PPC64 + disasm_info.mach = bfd_mach_ppc64; +#else + disasm_info.mach = bfd_mach_ppc; +#endif print_insn = print_insn_ppc; #elif defined(TARGET_MIPS) print_insn = print_insn_big_mips; @@ -3084,8 +3084,13 @@ int print_insn_ppc (bfd_vma pc, disassemble_info *info) opc = bfd_getb32(buf); else opc = bfd_getl32(buf); - return print_insn_powerpc (info, opc, pc, - PPC | B32 | M601); + if (info->mach == bfd_mach_ppc64) { + return print_insn_powerpc (info, opc, pc, + PPC | B64); + } else { + return print_insn_powerpc (info, opc, pc, + PPC | B32 | M601); + } } /* Print a PowerPC or POWER instruction. */ |