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authorBernhard Beschow <shentey@gmail.com>2023-10-07 14:38:15 +0200
committerMichael S. Tsirkin <mst@redhat.com>2023-10-22 05:18:16 -0400
commit40f70623875b4ae46e04f57cfa7c80b6af917e1b (patch)
tree1b73bd098e61f020bd8c5754c5de5090398e260c
parentb9a8b8d29f438b6a695b12bd2d3e0567cbae5dc7 (diff)
hw/isa/piix3: Rename "pic" attribute to "isa_irqs_in"
TYPE_PIIX3_DEVICE doesn't instantiate a PIC since it relies on the board to do so. The "pic" attribute, however, suggests that there is one. Rename the attribute to reflect that it represents ISA interrupt lines. Use the same naming convention as in the VIA south bridges as well as in TYPE_I82378. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20231007123843.127151-8-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r--hw/isa/piix3.c5
-rw-r--r--include/hw/southbridge/piix.h2
2 files changed, 4 insertions, 3 deletions
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index c17547a2c0..616f5418fa 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -36,7 +36,7 @@
static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq)
{
- qemu_set_irq(piix3->pic[pic_irq],
+ qemu_set_irq(piix3->isa_irqs_in[pic_irq],
!!(piix3->pic_levels &
(((1ULL << PIIX_NUM_PIRQS) - 1) <<
(pic_irq * PIIX_NUM_PIRQS))));
@@ -312,7 +312,8 @@ static void pci_piix3_init(Object *obj)
{
PIIX3State *d = PIIX3_PCI_DEVICE(obj);
- qdev_init_gpio_out_named(DEVICE(obj), d->pic, "isa-irqs", ISA_NUM_IRQS);
+ qdev_init_gpio_out_named(DEVICE(obj), d->isa_irqs_in, "isa-irqs",
+ ISA_NUM_IRQS);
object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
}
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index bb898c6c88..b07ff6bb26 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -46,7 +46,7 @@ struct PIIXState {
#endif
uint64_t pic_levels;
- qemu_irq pic[ISA_NUM_IRQS];
+ qemu_irq isa_irqs_in[ISA_NUM_IRQS];
/* This member isn't used. Just for save/load compatibility */
int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS];