diff options
| author | Matheus Tavares Bernardino <quic_mathbern@quicinc.com> | 2023-05-24 11:41:48 -0300 |
|---|---|---|
| committer | Taylor Simpson <tsimpson@quicinc.com> | 2023-05-26 07:03:41 -0700 |
| commit | 2babbd93904721c538148a497ad5d5aa6cd2e1ef (patch) | |
| tree | d40c900feb31d3b8f7c3c0d7af84c3ad75d05e57 | |
| parent | 3608c2419c95e7477dd282bb1268c78029501df8 (diff) | |
Hexagon: fix outdated `hex_new_*` comments
Some code comments refer to hex_new_value and hex_new_pred_value, which
have been transferred to DisasContext and, in the case of hex_new_value,
should now be accessed through get_result_gpr().
In order to fix this outdated comments and also avoid having to tweak
them whenever we make a variable name change in the future, let's
replace them with pseudocode.
Suggested-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <8e1689e28dd7b1318369b55127cf47b82ab75921.1684939078.git.quic_mathbern@quicinc.com>
| -rw-r--r-- | target/hexagon/genptr.c | 26 | ||||
| -rw-r--r-- | target/hexagon/translate.c | 2 |
2 files changed, 13 insertions, 15 deletions
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index cb2aa28a19..bcb287dd8b 100644 --- a/target/hexagon/genptr.c +++ b/target/hexagon/genptr.c @@ -878,9 +878,9 @@ static void gen_endloop0(DisasContext *ctx) */ if (!ctx->is_tight_loop) { /* - * if (hex_gpr[HEX_REG_LC0] > 1) { - * PC = hex_gpr[HEX_REG_SA0]; - * hex_new_value[HEX_REG_LC0] = hex_gpr[HEX_REG_LC0] - 1; + * if (LC0 > 1) { + * PC = SA0; + * LC0--; * } */ TCGLabel *label3 = gen_new_label(); @@ -897,9 +897,9 @@ static void gen_endloop0(DisasContext *ctx) static void gen_endloop1(DisasContext *ctx) { /* - * if (hex_gpr[HEX_REG_LC1] > 1) { - * PC = hex_gpr[HEX_REG_SA1]; - * hex_new_value[HEX_REG_LC1] = hex_gpr[HEX_REG_LC1] - 1; + * if (LC1 > 1) { + * PC = SA1; + * LC1--; * } */ TCGLabel *label = gen_new_label(); @@ -946,14 +946,12 @@ static void gen_endloop01(DisasContext *ctx) gen_set_label(label2); /* - * if (hex_gpr[HEX_REG_LC0] > 1) { - * PC = hex_gpr[HEX_REG_SA0]; - * hex_new_value[HEX_REG_LC0] = hex_gpr[HEX_REG_LC0] - 1; - * } else { - * if (hex_gpr[HEX_REG_LC1] > 1) { - * hex_next_pc = hex_gpr[HEX_REG_SA1]; - * hex_new_value[HEX_REG_LC1] = hex_gpr[HEX_REG_LC1] - 1; - * } + * if (LC0 > 1) { + * PC = SA0; + * LC0--; + * } else if (LC1 > 1) { + * PC = SA1; + * LC1--; * } */ tcg_gen_brcondi_tl(TCG_COND_LEU, hex_gpr[HEX_REG_LC0], 1, label3); diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index b18f1a9051..8838ab2364 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -556,7 +556,7 @@ static void gen_start_packet(DisasContext *ctx) } /* - * Preload the predicated pred registers into hex_new_pred_value[pred_num] + * Preload the predicated pred registers into ctx->new_pred_value[pred_num] * Only endloop instructions conditionally write to pred registers */ if (ctx->need_commit && pkt->pkt_has_endloop) { |