diff options
| author | Maciej W. Rozycki <macro@codesourcery.com> | 2014-11-07 20:05:35 +0000 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2014-12-16 12:45:19 +0000 |
| commit | c3577479815f5bcf9d38993967bca2115af245d8 (patch) | |
| tree | 0aac6c1eae93ffde21d7a83d4db52cf4e727905e | |
| parent | 8fc605b8aa257feb3e69d44794a765bd492b573b (diff) | |
target-mips: Correct MIPS16/microMIPS branch size calculation
Correct MIPS16/microMIPS branch size calculation in PC adjustment
needed:
- to set the value of CP0.ErrorEPC at the entry to the reset exception,
- for the purpose of branch reexecution in the context of device I/O.
Follow the approach taken in `exception_resume_pc' for ordinary, Debug
and NMI exceptions.
MIPS16 and microMIPS branches can be 2 or 4 bytes in size and that has
to be reflected in calculation. Original MIPS ISA branches, which is
where this code originates from, are always 4 bytes long, just as all
original MIPS ISA instructions.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
| -rw-r--r-- | target-mips/translate.c | 3 | ||||
| -rw-r--r-- | translate-all.c | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index a5a5ca44ee..b5d5b39092 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -19439,7 +19439,8 @@ void cpu_state_reset(CPUMIPSState *env) if (env->hflags & MIPS_HFLAG_BMASK) { /* If the exception was raised from a delay slot, come back to the jump. */ - env->CP0_ErrorEPC = env->active_tc.PC - 4; + env->CP0_ErrorEPC = (env->active_tc.PC + - (env->hflags & MIPS_HFLAG_B16 ? 2 : 4)); } else { env->CP0_ErrorEPC = env->active_tc.PC; } diff --git a/translate-all.c b/translate-all.c index cf05472008..d930a5ce67 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1540,7 +1540,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr) branch. */ #if defined(TARGET_MIPS) if ((env->hflags & MIPS_HFLAG_BMASK) != 0 && n > 1) { - env->active_tc.PC -= 4; + env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); cpu->icount_decr.u16.low++; env->hflags &= ~MIPS_HFLAG_BMASK; } |