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| author | Taylor Simpson <ltaylorsimpson@gmail.com> | 2023-12-10 15:07:11 -0700 |
|---|---|---|
| committer | Brian Cain <bcain@quicinc.com> | 2024-01-21 22:02:26 -0800 |
| commit | 800abf87b0b7f34b610aae9d64481c302eb83159 (patch) | |
| tree | 1f88ddadb8f03e770c54a243c1110ed9d5681e81 | |
| parent | 66fab981c0407aa0374684e196cf4ac17b976721 (diff) | |
Hexagon (target/hexagon) Remove unused WRITES_PRED_REG attribute
This is the only remaining use of the is_written function. We will
remove it in the subsequent commit.
Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Message-Id: <20231210220712.491494-9-ltaylorsimpson@gmail.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>
| -rw-r--r-- | target/hexagon/attribs_def.h.inc | 1 | ||||
| -rwxr-xr-x | target/hexagon/hex_common.py | 11 |
2 files changed, 0 insertions, 12 deletions
diff --git a/target/hexagon/attribs_def.h.inc b/target/hexagon/attribs_def.h.inc index 21d457fa4a..87942d46f4 100644 --- a/target/hexagon/attribs_def.h.inc +++ b/target/hexagon/attribs_def.h.inc @@ -117,7 +117,6 @@ DEF_ATTRIB(IMPLICIT_READS_P1, "Reads the P1 register", "", "") DEF_ATTRIB(IMPLICIT_READS_P2, "Reads the P2 register", "", "") DEF_ATTRIB(IMPLICIT_READS_P3, "Reads the P3 register", "", "") DEF_ATTRIB(IMPLICIT_WRITES_USR, "May write USR", "", "") -DEF_ATTRIB(WRITES_PRED_REG, "Writes a predicate register", "", "") DEF_ATTRIB(COMMUTES, "The operation is communitive", "", "") DEF_ATTRIB(DEALLOCRET, "dealloc_return", "", "") DEF_ATTRIB(DEALLOCFRAME, "deallocframe", "", "") diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py index 4565dd1953..ca5e9630c1 100755 --- a/target/hexagon/hex_common.py +++ b/target/hexagon/hex_common.py @@ -94,10 +94,6 @@ def is_cond_call(tag): def calculate_attribs(): add_qemu_macro_attrib("fREAD_PC", "A_IMPLICIT_READS_PC") add_qemu_macro_attrib("fTRAP", "A_IMPLICIT_READS_PC") - add_qemu_macro_attrib("fWRITE_P0", "A_WRITES_PRED_REG") - add_qemu_macro_attrib("fWRITE_P1", "A_WRITES_PRED_REG") - add_qemu_macro_attrib("fWRITE_P2", "A_WRITES_PRED_REG") - add_qemu_macro_attrib("fWRITE_P3", "A_WRITES_PRED_REG") add_qemu_macro_attrib("fSET_OVERFLOW", "A_IMPLICIT_WRITES_USR") add_qemu_macro_attrib("fSET_LPCFG", "A_IMPLICIT_WRITES_USR") add_qemu_macro_attrib("fLOAD", "A_SCALAR_LOAD") @@ -122,13 +118,6 @@ def calculate_attribs(): continue macro = macros[macname] attribdict[tag] |= set(macro.attribs) - # Figure out which instructions write predicate registers - tagregs = get_tagregs() - for tag in tags: - regs = tagregs[tag] - for regtype, regid in regs: - if regtype == "P" and is_written(regid): - attribdict[tag].add("A_WRITES_PRED_REG") # Mark conditional jumps and calls # Not all instructions are properly marked with A_CONDEXEC for tag in tags: |