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| author | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2012-01-10 10:17:21 +0100 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2012-01-12 13:54:16 +0100 |
| commit | 48b5e96f0f7006f46a7d6c6f0934a6acdda22e3b (patch) | |
| tree | 87714ec1e00a6c0e51c83f767ad5ead5656d43a4 | |
| parent | 2355c16e74ffa4d14e7fc2b4a23b055565ac0221 (diff) | |
microblaze: Add support for the clz insn
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
| -rw-r--r-- | target-microblaze/helper.h | 1 | ||||
| -rw-r--r-- | target-microblaze/op_helper.c | 5 | ||||
| -rw-r--r-- | target-microblaze/translate.c | 11 |
3 files changed, 17 insertions, 0 deletions
diff --git a/target-microblaze/helper.h b/target-microblaze/helper.h index b92aa34d05..a8d75c0bf0 100644 --- a/target-microblaze/helper.h +++ b/target-microblaze/helper.h @@ -5,6 +5,7 @@ DEF_HELPER_0(debug, void) DEF_HELPER_FLAGS_3(carry, TCG_CALL_PURE | TCG_CALL_CONST, i32, i32, i32, i32) DEF_HELPER_2(cmp, i32, i32, i32) DEF_HELPER_2(cmpu, i32, i32, i32) +DEF_HELPER_FLAGS_1(clz, TCG_CALL_PURE | TCG_CALL_CONST, i32, i32) DEF_HELPER_2(divs, i32, i32, i32) DEF_HELPER_2(divu, i32, i32, i32) diff --git a/target-microblaze/op_helper.c b/target-microblaze/op_helper.c index 7433cec291..d99c564375 100644 --- a/target-microblaze/op_helper.c +++ b/target-microblaze/op_helper.c @@ -165,6 +165,11 @@ uint32_t helper_cmpu(uint32_t a, uint32_t b) return t; } +uint32_t helper_clz(uint32_t t0) +{ + return clz32(t0); +} + uint32_t helper_carry(uint32_t a, uint32_t b, uint32_t cf) { uint32_t ncf; diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index d7f513d34d..f4e6f3011b 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -809,6 +809,17 @@ static void dec_bit(DisasContext *dc) return; } break; + case 0xe0: + if ((dc->tb_flags & MSR_EE_FLAG) + && (dc->env->pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK) + && !((dc->env->pvr.regs[2] & PVR2_USE_PCMP_INSTR))) { + tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP); + t_gen_raise_exception(dc, EXCP_HW_EXCP); + } + if (dc->env->pvr.regs[2] & PVR2_USE_PCMP_INSTR) { + gen_helper_clz(cpu_R[dc->rd], cpu_R[dc->ra]); + } + break; default: cpu_abort(dc->env, "unknown bit oc=%x op=%x rd=%d ra=%d rb=%d\n", dc->pc, op, dc->rd, dc->ra, dc->rb); |