diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2014-02-26 17:20:02 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-02-26 17:20:02 +0000 |
commit | 0eef9d9833df1c2376bd3b761abc6580df15af3b (patch) | |
tree | b8e1e087321a63c0e5d44bc5a1dfa479912c00c5 | |
parent | 7da845b0f42a791d65045284f90977d636c654cc (diff) |
target-arm: Implement AArch64 CurrentEL sysreg
Implement the CurrentEL sysreg.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
-rw-r--r-- | target-arm/cpu.h | 3 | ||||
-rw-r--r-- | target-arm/helper.c | 3 | ||||
-rw-r--r-- | target-arm/translate-a64.c | 7 |
3 files changed, 12 insertions, 1 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 8c4ed0f3e4..632b4d1722 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -731,7 +731,8 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid) #define ARM_CP_NOP (ARM_CP_SPECIAL | (1 << 8)) #define ARM_CP_WFI (ARM_CP_SPECIAL | (2 << 8)) #define ARM_CP_NZCV (ARM_CP_SPECIAL | (3 << 8)) -#define ARM_LAST_SPECIAL ARM_CP_NZCV +#define ARM_CP_CURRENTEL (ARM_CP_SPECIAL | (4 << 8)) +#define ARM_LAST_SPECIAL ARM_CP_CURRENTEL /* Used only as a terminator for ARMCPRegInfo lists */ #define ARM_CP_SENTINEL 0xffff /* Mask of only the flag bits in a type field */ diff --git a/target-arm/helper.c b/target-arm/helper.c index 2fdf3a7e5d..ff1ed7d551 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1533,6 +1533,9 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { .opc0 = 3, .opc1 = 3, .opc2 = 7, .crn = 0, .crm = 0, .access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0x10 }, + { .name = "CURRENTEL", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 0, .opc2 = 2, .crn = 4, .crm = 2, + .access = PL1_R, .type = ARM_CP_CURRENTEL }, REGINFO_SENTINEL }; diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 8752e7e16c..ec2d9dc219 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -1231,6 +1231,13 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread, gen_set_nzcv(tcg_rt); } return; + case ARM_CP_CURRENTEL: + /* Reads as current EL value from pstate, which is + * guaranteed to be constant by the tb flags. + */ + tcg_rt = cpu_reg(s, rt); + tcg_gen_movi_i64(tcg_rt, s->current_pl << 2); + return; default: break; } |