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author | Richard Henderson <richard.henderson@linaro.org> | 2021-11-11 12:07:24 +0100 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2021-11-11 12:07:24 +0100 |
commit | 70f872ca916ac4552fa71d82b8d006b3e679089e (patch) | |
tree | d2a9cdefebd78be7e638d2e8ab97d6e46b39cc70 | |
parent | 1b9fc6d8ba6667ceb56a3392e84656dcaed0d676 (diff) | |
parent | d58f01733b94845b0c2232018a2bedb6a2347ec5 (diff) |
Merge tag 'pull-tcg-20211111' of https://gitlab.com/rth7680/qemu into staging
appease coverity vs extract2
update docs for ctpop opcodes
tcg/s390x build fix for gcc11
# gpg: Signature made Thu 11 Nov 2021 12:05:20 PM CET
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-tcg-20211111' of https://gitlab.com/rth7680/qemu:
tcg/s390x: Fix tcg_out_vec_op argument type
tcg: Document ctpop opcodes
tcg: Remove TCI experimental status
tcg/optimize: Add an extra cast to fold_extract2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r-- | docs/about/build-platforms.rst | 10 | ||||
-rw-r--r-- | meson.build | 4 | ||||
-rw-r--r-- | meson_options.txt | 2 | ||||
-rw-r--r-- | scripts/meson-buildoptions.sh | 3 | ||||
-rw-r--r-- | tcg/README | 6 | ||||
-rw-r--r-- | tcg/optimize.c | 2 | ||||
-rw-r--r-- | tcg/s390x/tcg-target.c.inc | 3 |
7 files changed, 19 insertions, 11 deletions
diff --git a/docs/about/build-platforms.rst b/docs/about/build-platforms.rst index bcb1549721..c29a4b8fe6 100644 --- a/docs/about/build-platforms.rst +++ b/docs/about/build-platforms.rst @@ -54,10 +54,12 @@ Those hosts are officially supported, with various accelerators: * - x86 - hax, hvf (64 bit only), kvm, nvmm, tcg, whpx (64 bit only), xen -Other host architectures are not supported. It is possible to build QEMU on an -unsupported host architecture using the configure ``--enable-tcg-interpreter`` -option to enable the experimental TCI support, but note that this is very slow -and is not recommended. +Other host architectures are not supported. It is possible to build QEMU system +emulation on an unsupported host architecture using the configure +``--enable-tcg-interpreter`` option to enable the TCI support, but note that +this is very slow and is not recommended for normal use. QEMU user emulation +requires host-specific support for signal handling, therefore TCI won't help +on unsupported host architectures. Non-supported architectures may be removed in the future following the :ref:`deprecation process<Deprecated features>`. diff --git a/meson.build b/meson.build index 9702fdce6d..2ece4fe088 100644 --- a/meson.build +++ b/meson.build @@ -335,7 +335,7 @@ tcg_arch = config_host['ARCH'] if not get_option('tcg').disabled() if cpu not in supported_cpus if get_option('tcg_interpreter') - warning('Unsupported CPU @0@, will use TCG with TCI (experimental and slow)'.format(cpu)) + warning('Unsupported CPU @0@, will use TCG with TCI (slow)'.format(cpu)) else error('Unsupported CPU @0@, try --enable-tcg-interpreter'.format(cpu)) endif @@ -3290,7 +3290,7 @@ endif summary_info += {'TCG support': config_all.has_key('CONFIG_TCG')} if config_all.has_key('CONFIG_TCG') if get_option('tcg_interpreter') - summary_info += {'TCG backend': 'TCI (TCG with bytecode interpreter, experimental and slow)'} + summary_info += {'TCG backend': 'TCI (TCG with bytecode interpreter, slow)'} else summary_info += {'TCG backend': 'native (@0@)'.format(cpu)} endif diff --git a/meson_options.txt b/meson_options.txt index e740dce2a5..411952bc91 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -59,7 +59,7 @@ option('xen_pci_passthrough', type: 'feature', value: 'auto', option('tcg', type: 'feature', value: 'auto', description: 'TCG support') option('tcg_interpreter', type: 'boolean', value: false, - description: 'TCG with bytecode interpreter (experimental and slow)') + description: 'TCG with bytecode interpreter (slow)') option('cfi', type: 'boolean', value: 'false', description: 'Control-Flow Integrity (CFI)') option('cfi_debug', type: 'boolean', value: 'false', diff --git a/scripts/meson-buildoptions.sh b/scripts/meson-buildoptions.sh index 55b8a78560..45e1f2e20d 100644 --- a/scripts/meson-buildoptions.sh +++ b/scripts/meson-buildoptions.sh @@ -13,8 +13,7 @@ meson_options_help() { printf "%s\n" ' jemalloc/system/tcmalloc)' printf "%s\n" ' --enable-slirp[=CHOICE] Whether and how to find the slirp library' printf "%s\n" ' (choices: auto/disabled/enabled/internal/system)' - printf "%s\n" ' --enable-tcg-interpreter TCG with bytecode interpreter (experimental and' - printf "%s\n" ' slow)' + printf "%s\n" ' --enable-tcg-interpreter TCG with bytecode interpreter (slow)' printf "%s\n" ' --enable-trace-backends=CHOICE' printf "%s\n" ' Set available tracing backends [log] (choices:' printf "%s\n" ' dtrace/ftrace/log/nop/simple/syslog/ust)' diff --git a/tcg/README b/tcg/README index c2e7762a37..bc15cc3b32 100644 --- a/tcg/README +++ b/tcg/README @@ -254,6 +254,12 @@ t0 = t1 ? clz(t1) : t2 t0 = t1 ? ctz(t1) : t2 +* ctpop_i32/i64 t0, t1 + +t0 = number of bits set in t1 +With "ctpop" short for "count population", matching +the function name used in include/qemu/host-utils.h. + ********* Shifts/Rotates * shl_i32/i64 t0, t1, t2 diff --git a/tcg/optimize.c b/tcg/optimize.c index dbb2d46e88..2397f2cf93 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -1365,7 +1365,7 @@ static bool fold_extract2(OptContext *ctx, TCGOp *op) v2 <<= 64 - shr; } else { v1 = (uint32_t)v1 >> shr; - v2 = (int32_t)v2 << (32 - shr); + v2 = (uint64_t)((int32_t)v2 << (32 - shr)); } return tcg_opt_gen_movi(ctx, op, op->args[0], v1 | v2); } diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 8938c446c8..57e803e339 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -2699,7 +2699,8 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece, static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, unsigned vecl, unsigned vece, - const TCGArg *args, const int *const_args) + const TCGArg args[TCG_MAX_OP_ARGS], + const int const_args[TCG_MAX_OP_ARGS]) { TCGType type = vecl + TCG_TYPE_V64; TCGArg a0 = args[0], a1 = args[1], a2 = args[2]; |