diff options
| author | Andrew Towers <atowers@gmail.com> | 2012-03-29 02:41:08 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-03-30 10:10:49 +0000 |
| commit | 06ed5d66f77f2794344c7dfd3d21a07e97f0b8fa (patch) | |
| tree | f305011fef1f446e74d3633fc7e176306d4a57b7 | |
| parent | dec9c2d4306d7b4f8ffff482ac42dc468ed2a61d (diff) | |
ARM: Permit any ARMv6K CPU to read the MVFR0 and MVFR1 VFP registers.
This patch replaces the ARM_FEATURE_VFP3 test when reading MVFR registers
with a test for a new feature flag ARM_FEATURE_MVFR, and sets this feature
for all ARMv6K cores (ARM1156 is not a v6K core, yet supports MVFR; qemu
does not support ARM1156 at this time.)
MVFR0 and MVFR1 were introduced in ARM1136JF-S r1p0 (ARMv6K, VFPv2) and are
present in ARM1156T2F-S (non-v6K), ARM1176JZF-S, ARM11MPCore and newer cores.
Reference: ARM DDI 0211H, 0290G, 0301H, 0360E.
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0211h/Ffbefjag.html
Without this change, the linux kernel will not boot with VFP support enabled
under ARM1176 system emulation, due to the unconditional use of MVFR1 at the
end of vfp_init() in arch/arm/vfp/vfpmodule.c:
VFP support v0.3: implemetor 41 architecture 1 part 20 variant b rev 5
Internal error: Oops - undefined instruction: 0 [#1]
Signed-off-by: Andrew Towers <atowers@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target-arm/cpu.h | 1 | ||||
| -rw-r--r-- | target-arm/helper.c | 1 | ||||
| -rw-r--r-- | target-arm/translate.c | 2 |
3 files changed, 3 insertions, 1 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index a68df615e4..e176c5f65c 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -382,6 +382,7 @@ enum arm_features { ARM_FEATURE_ARM_DIV, /* divide supported in ARM encoding */ ARM_FEATURE_VFP4, /* VFPv4 (implies that NEON is v2) */ ARM_FEATURE_GENERIC_TIMER, + ARM_FEATURE_MVFR, /* Media and VFP Feature Registers 0 and 1 */ }; static inline int arm_feature(CPUARMState *env, int feature) diff --git a/target-arm/helper.c b/target-arm/helper.c index dd8e3067d0..d974b579dc 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -254,6 +254,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) } if (arm_feature(env, ARM_FEATURE_V6K)) { set_feature(env, ARM_FEATURE_V6); + set_feature(env, ARM_FEATURE_MVFR); } if (arm_feature(env, ARM_FEATURE_V6)) { set_feature(env, ARM_FEATURE_V5); diff --git a/target-arm/translate.c b/target-arm/translate.c index 81725d1687..46d1d3ef9f 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -2906,7 +2906,7 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn) case ARM_VFP_MVFR0: case ARM_VFP_MVFR1: if (IS_USER(s) - || !arm_feature(env, ARM_FEATURE_VFP3)) + || !arm_feature(env, ARM_FEATURE_MVFR)) return 1; tmp = load_cpu_field(vfp.xregs[rn]); break; |