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authorVijay <vijayak@cavium.com>2016-07-14 16:51:36 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-07-14 16:51:36 +0100
commit7069532e3b944c25707d4f69998e68a739eabff9 (patch)
tree7200cf21fb43f5d5093d1eada2ff291aff8227e8
parent56215da394e9b784d425bc27cb826baf16c18b0d (diff)
target-arm: Use Neon for zero checking
Use Neon instructions to perform zero checking of buffer. This is helps in reducing total migration time. Use case: Idle VM live migration with 4 VCPUS and 8GB ram running CentOS 7. Without Neon, the Total migration time is 3.5 Sec Migration status: completed total time: 3560 milliseconds downtime: 33 milliseconds setup: 5 milliseconds transferred ram: 297907 kbytes throughput: 685.76 mbps remaining ram: 0 kbytes total ram: 8519872 kbytes duplicate: 2062760 pages skipped: 0 pages normal: 69808 pages normal bytes: 279232 kbytes dirty sync count: 3 With Neon, the total migration time is 2.9 Sec Migration status: completed total time: 2960 milliseconds downtime: 65 milliseconds setup: 4 milliseconds transferred ram: 299869 kbytes throughput: 830.19 mbps remaining ram: 0 kbytes total ram: 8519872 kbytes duplicate: 2064313 pages skipped: 0 pages normal: 70294 pages normal bytes: 281176 kbytes dirty sync count: 3 Signed-off-by: Vijaya Kumar K <vijayak@cavium.com> Signed-off-by: Suresh <ksuresh@cavium.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1467190029-694-2-git-send-email-vijayak@cavium.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--util/cutils.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/util/cutils.c b/util/cutils.c
index 5830a688dc..7505fdaa81 100644
--- a/util/cutils.c
+++ b/util/cutils.c
@@ -184,6 +184,13 @@ int qemu_fdatasync(int fd)
#define SPLAT(p) _mm_set1_epi8(*(p))
#define ALL_EQ(v1, v2) (_mm_movemask_epi8(_mm_cmpeq_epi8(v1, v2)) == 0xFFFF)
#define VEC_OR(v1, v2) (_mm_or_si128(v1, v2))
+#elif defined(__aarch64__)
+#include "arm_neon.h"
+#define VECTYPE uint64x2_t
+#define ALL_EQ(v1, v2) \
+ ((vgetq_lane_u64(v1, 0) == vgetq_lane_u64(v2, 0)) && \
+ (vgetq_lane_u64(v1, 1) == vgetq_lane_u64(v2, 1)))
+#define VEC_OR(v1, v2) ((v1) | (v2))
#else
#define VECTYPE unsigned long
#define SPLAT(p) (*(p) * (~0UL / 255))