target-alpha: Convert ARITH3 to source/sink

Signed-off-by: Richard Henderson <rth@twiddle.net>

1 files changed, 39 insertions, 69 deletions

diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index bb84d8c1b0..cff79ef626 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -1258,43 +1258,6 @@ static void gen_msk_l(DisasContext *ctx, TCGv vc, TCGv va, int rb, bool islit,
     }
 }
 
-/* Code to call arith3 helpers */
-#define ARITH3(name)                                                  \
-static inline void glue(gen_, name)(int ra, int rb, int rc, int islit,\
-                                    uint8_t lit)                      \
-{                                                                     \
-    if (unlikely(rc == 31))                                           \
-        return;                                                       \
-                                                                      \
-    if (ra != 31) {                                                   \
-        if (islit) {                                                  \
-            TCGv tmp = tcg_const_i64(lit);                            \
-            gen_helper_ ## name(cpu_ir[rc], cpu_ir[ra], tmp);         \
-            tcg_temp_free(tmp);                                       \
-        } else                                                        \
-            gen_helper_ ## name (cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); \
-    } else {                                                          \
-        TCGv tmp1 = tcg_const_i64(0);                                 \
-        if (islit) {                                                  \
-            TCGv tmp2 = tcg_const_i64(lit);                           \
-            gen_helper_ ## name (cpu_ir[rc], tmp1, tmp2);             \
-            tcg_temp_free(tmp2);                                      \
-        } else                                                        \
-            gen_helper_ ## name (cpu_ir[rc], tmp1, cpu_ir[rb]);       \
-        tcg_temp_free(tmp1);                                          \
-    }                                                                 \
-}
-ARITH3(cmpbge)
-ARITH3(minub8)
-ARITH3(minsb8)
-ARITH3(minuw4)
-ARITH3(minsw4)
-ARITH3(maxub8)
-ARITH3(maxsb8)
-ARITH3(maxuw4)
-ARITH3(maxsw4)
-ARITH3(perr)
-
 #define MVIOP2(name)                                    \
 static inline void glue(gen_, name)(int rb, int rc)     \
 {                                                       \
@@ -1765,7 +1728,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
             break;
         case 0x0F:
             /* CMPBGE */
-            gen_cmpbge(ra, rb, rc, islit, lit);
+            gen_helper_cmpbge(vc, va, vb);
             break;
         case 0x12:
             /* S8ADDL */
@@ -2619,45 +2582,61 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
 
     case 0x1C:
         vc = dest_gpr(ctx, rc);
+        if (fn7 == 0x70) {
+            /* FTOIT */
+            REQUIRE_TB_FLAG(TB_FLAGS_AMASK_FIX);
+            REQUIRE_REG_31(rb);
+            va = load_fpr(ctx, ra);
+            tcg_gen_mov_i64(vc, va);
+            break;
+        } else if (fn7 == 0x78) {
+            /* FTOIS */
+            REQUIRE_TB_FLAG(TB_FLAGS_AMASK_FIX);
+            REQUIRE_REG_31(rb);
+            t32 = tcg_temp_new_i32();
+            va = load_fpr(ctx, ra);
+            gen_helper_s_to_memory(t32, va);
+            tcg_gen_ext_i32_i64(vc, t32);
+            tcg_temp_free_i32(t32);
+            break;
+        }
+
+        vb = load_gpr_lit(ctx, rb, lit, islit);
         switch (fn7) {
         case 0x00:
             /* SEXTB */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_BWX);
             REQUIRE_REG_31(ra);
-            vb = load_gpr_lit(ctx, rb, lit, islit);
             tcg_gen_ext8s_i64(vc, vb);
             break;
         case 0x01:
             /* SEXTW */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_BWX);
             REQUIRE_REG_31(ra);
-            vb = load_gpr_lit(ctx, rb, lit, islit);
             tcg_gen_ext16s_i64(vc, vb);
             break;
         case 0x30:
             /* CTPOP */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_CIX);
             REQUIRE_REG_31(ra);
-            vb = load_gpr_lit(ctx, rb, lit, islit);
             gen_helper_ctpop(vc, vb);
             break;
         case 0x31:
             /* PERR */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
-            gen_perr(ra, rb, rc, islit, lit);
+            va = load_gpr(ctx, ra);
+            gen_helper_perr(vc, va, vb);
             break;
         case 0x32:
             /* CTLZ */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_CIX);
             REQUIRE_REG_31(ra);
-            vb = load_gpr_lit(ctx, rb, lit, islit);
             gen_helper_ctlz(vc, vb);
             break;
         case 0x33:
             /* CTTZ */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_CIX);
             REQUIRE_REG_31(ra);
-            vb = load_gpr_lit(ctx, rb, lit, islit);
             gen_helper_cttz(vc, vb);
             break;
         case 0x34:
@@ -2687,59 +2666,50 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
         case 0x38:
             /* MINSB8 */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
-            gen_minsb8(ra, rb, rc, islit, lit);
+            va = load_gpr(ctx, ra);
+            gen_helper_minsb8(vc, va, vb);
             break;
         case 0x39:
             /* MINSW4 */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
-            gen_minsw4(ra, rb, rc, islit, lit);
+            va = load_gpr(ctx, ra);
+            gen_helper_minsw4(vc, va, vb);
             break;
         case 0x3A:
             /* MINUB8 */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
-            gen_minub8(ra, rb, rc, islit, lit);
+            va = load_gpr(ctx, ra);
+            gen_helper_minub8(vc, va, vb);
             break;
         case 0x3B:
             /* MINUW4 */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
-            gen_minuw4(ra, rb, rc, islit, lit);
+            va = load_gpr(ctx, ra);
+            gen_helper_minuw4(vc, va, vb);
             break;
         case 0x3C:
             /* MAXUB8 */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
-            gen_maxub8(ra, rb, rc, islit, lit);
+            va = load_gpr(ctx, ra);
+            gen_helper_maxub8(vc, va, vb);
             break;
         case 0x3D:
             /* MAXUW4 */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
-            gen_maxuw4(ra, rb, rc, islit, lit);
+            va = load_gpr(ctx, ra);
+            gen_helper_maxuw4(vc, va, vb);
             break;
         case 0x3E:
             /* MAXSB8 */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
-            gen_maxsb8(ra, rb, rc, islit, lit);
+            va = load_gpr(ctx, ra);
+            gen_helper_maxsb8(vc, va, vb);
             break;
         case 0x3F:
             /* MAXSW4 */
             REQUIRE_TB_FLAG(TB_FLAGS_AMASK_MVI);
-            gen_maxsw4(ra, rb, rc, islit, lit);
-            break;
-        case 0x70:
-            /* FTOIT */
-            REQUIRE_TB_FLAG(TB_FLAGS_AMASK_FIX);
-            REQUIRE_REG_31(rb);
-            va = load_fpr(ctx, ra);
-            tcg_gen_mov_i64(vc, va);
-            break;
-        case 0x78:
-            /* FTOIS */
-            REQUIRE_TB_FLAG(TB_FLAGS_AMASK_FIX);
-            REQUIRE_REG_31(rb);
-            t32 = tcg_temp_new_i32();
-            va = load_fpr(ctx, ra);
-            gen_helper_s_to_memory(t32, va);
-            tcg_gen_ext_i32_i64(vc, t32);
-            tcg_temp_free_i32(t32);
+            va = load_gpr(ctx, ra);
+            gen_helper_maxsw4(vc, va, vb);
             break;
         default:
             goto invalid_opc;