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author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-04-10 21:42:18 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-04-10 21:42:18 +0000 |
commit | 11f94258ace2a1ffb2783e6af0fb973c3f6df44a (patch) | |
tree | dfa02e0c05bde8891edba2aebe91be3ae358554d | |
parent | a4e8338de83645f993608ecb9c520b59f068f162 (diff) |
target-mips: optimize gen_movcf_d()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7077 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r-- | target-mips/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 0c88d2f072..50aaf3ac74 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -5833,7 +5833,7 @@ static inline void gen_movcf_d (DisasContext *ctx, int fs, int fd, int cc, int t tcg_gen_andi_i32(t0, fpu_fcr31, get_fp_bit(cc)); tcg_gen_brcondi_i32(cond, t0, 0, l1); tcg_temp_free_i32(t0); - fp0 = tcg_temp_local_new_i64(); + fp0 = tcg_temp_new_i64(); gen_load_fpr64(ctx, fp0, fs); gen_store_fpr64(ctx, fp0, fd); tcg_temp_free_i64(fp0); |