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authorRichard Henderson <rth@twiddle.net>2017-02-08 15:06:54 -0800
committerRichard Henderson <rth@twiddle.net>2017-02-14 08:14:58 +1100
commit4a09d0bb34ab030e09e87173b2e3ec0fd7616cff (patch)
tree4ed7ec1405016274a6e6ad540a4135101c27e570
parent305e6c8a2ff7a6e3f4942b50e853230f18eeb5a9 (diff)
target/openrisc: Rename the cpu from or32 to or1k
This is in keeping with the toolchain and or1ksim. Signed-off-by: Richard Henderson <rth@twiddle.net>
-rwxr-xr-xconfigure6
-rw-r--r--default-configs/or1k-linux-user.mak1
-rw-r--r--default-configs/or1k-softmmu.mak4
-rw-r--r--default-configs/or32-linux-user.mak1
-rw-r--r--default-configs/or32-softmmu.mak4
-rw-r--r--hw/openrisc/openrisc_sim.c4
-rw-r--r--target/openrisc/cpu.h2
-rw-r--r--tests/tcg/openrisc/Makefile4
8 files changed, 13 insertions, 13 deletions
diff --git a/configure b/configure
index 63253398a2..1c9655e639 100755
--- a/configure
+++ b/configure
@@ -5843,7 +5843,7 @@ target_name=$(echo $target | cut -d '-' -f 1)
target_bigendian="no"
case "$target_name" in
- armeb|hppa|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+ armeb|hppa|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or1k|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@@ -5937,7 +5937,7 @@ case "$target_name" in
;;
nios2)
;;
- or32)
+ or1k)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
;;
@@ -6145,7 +6145,7 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
nios2)
disas_config "NIOS2"
;;
- or32)
+ or1k)
disas_config "OPENRISC"
;;
ppc*)
diff --git a/default-configs/or1k-linux-user.mak b/default-configs/or1k-linux-user.mak
new file mode 100644
index 0000000000..20e03c1317
--- /dev/null
+++ b/default-configs/or1k-linux-user.mak
@@ -0,0 +1 @@
+# Default configuration for or1k-linux-user
diff --git a/default-configs/or1k-softmmu.mak b/default-configs/or1k-softmmu.mak
new file mode 100644
index 0000000000..10bfa7abb8
--- /dev/null
+++ b/default-configs/or1k-softmmu.mak
@@ -0,0 +1,4 @@
+# Default configuration for or1k-softmmu
+
+CONFIG_SERIAL=y
+CONFIG_OPENCORES_ETH=y
diff --git a/default-configs/or32-linux-user.mak b/default-configs/or32-linux-user.mak
deleted file mode 100644
index 808c1f9b83..0000000000
--- a/default-configs/or32-linux-user.mak
+++ /dev/null
@@ -1 +0,0 @@
-# Default configuration for or32-linux-user
diff --git a/default-configs/or32-softmmu.mak b/default-configs/or32-softmmu.mak
deleted file mode 100644
index cce474672a..0000000000
--- a/default-configs/or32-softmmu.mak
+++ /dev/null
@@ -1,4 +0,0 @@
-# Default configuration for or32-softmmu
-
-CONFIG_SERIAL=y
-CONFIG_OPENCORES_ETH=y
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 6d06d5be01..fc0d0967b7 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -139,10 +139,10 @@ static void openrisc_sim_init(MachineState *machine)
static void openrisc_sim_machine_init(MachineClass *mc)
{
- mc->desc = "or32 simulation";
+ mc->desc = "or1k simulation";
mc->init = openrisc_sim_init;
mc->max_cpus = 1;
mc->is_default = 1;
}
-DEFINE_MACHINE("or32-sim", openrisc_sim_machine_init)
+DEFINE_MACHINE("or1k-sim", openrisc_sim_machine_init)
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index 508ef568b4..231c163617 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -32,7 +32,7 @@ struct OpenRISCCPU;
#include "fpu/softfloat.h"
#include "qom/cpu.h"
-#define TYPE_OPENRISC_CPU "or32-cpu"
+#define TYPE_OPENRISC_CPU "or1k-cpu"
#define OPENRISC_CPU_CLASS(klass) \
OBJECT_CLASS_CHECK(OpenRISCCPUClass, (klass), TYPE_OPENRISC_CPU)
diff --git a/tests/tcg/openrisc/Makefile b/tests/tcg/openrisc/Makefile
index 7e65888761..fb5ceda512 100644
--- a/tests/tcg/openrisc/Makefile
+++ b/tests/tcg/openrisc/Makefile
@@ -1,8 +1,8 @@
-include ../../config-host.mak
-CROSS = or32-linux-
+CROSS = or1k-linux-
-SIM = qemu-or32
+SIM = qemu-or1k
CC = $(CROSS)gcc