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authorAnthony Green <green@moxielogic.com>2013-03-18 15:49:25 -0400
committerBlue Swirl <blauwirbel@gmail.com>2013-03-23 14:25:42 +0000
commitd15a9c2390889623a681b4d0bc56371b4d25893c (patch)
tree0b7b769f7b2dfcd40bfea0b72ba2ebaa3205855c
parenta360d965821870fa1dbb3effdf7436b715ad3358 (diff)
Add top level changes for moxie
Signed-off-by: Anthony Green <green@moxielogic.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
-rw-r--r--MAINTAINERS5
-rw-r--r--arch_init.c2
-rwxr-xr-xconfigure9
-rw-r--r--cpu-exec.c2
-rw-r--r--default-configs/moxie-softmmu.mak1
-rw-r--r--qapi-schema.json6
6 files changed, 21 insertions, 4 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 0ca7e1da8c..db14ffc16c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -91,6 +91,11 @@ M: Aurelien Jarno <aurelien@aurel32.net>
S: Odd Fixes
F: target-mips/
+Moxie
+M: Anthony Green <green@moxielogic.com>
+S: Maintained
+F: target-moxie/
+
PowerPC
M: Alexander Graf <agraf@suse.de>
L: qemu-ppc@nongnu.org
diff --git a/arch_init.c b/arch_init.c
index 98e2bc6f55..e8ade9e639 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -85,6 +85,8 @@ int graphic_depth = 15;
#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
#elif defined(TARGET_MIPS)
#define QEMU_ARCH QEMU_ARCH_MIPS
+#elif defined(TARGET_MOXIE)
+#define QEMU_ARCH QEMU_ARCH_MOXIE
#elif defined(TARGET_OPENRISC)
#define QEMU_ARCH QEMU_ARCH_OPENRISC
#elif defined(TARGET_PPC)
diff --git a/configure b/configure
index bfc4dc6889..f2af714928 100755
--- a/configure
+++ b/configure
@@ -961,6 +961,7 @@ mips-softmmu \
mipsel-softmmu \
mips64-softmmu \
mips64el-softmmu \
+moxie-softmmu \
or32-softmmu \
ppc-softmmu \
ppcemb-softmmu \
@@ -3947,7 +3948,7 @@ target_arch2=`echo $target | cut -d '-' -f 1`
target_bigendian="no"
case "$target_arch2" in
- armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
+ armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb)
target_bigendian=yes
;;
esac
@@ -4051,6 +4052,8 @@ case "$target_arch2" in
echo "TARGET_ABI_MIPSN64=y" >> $config_target_mak
target_long_alignment=8
;;
+ moxie)
+ ;;
or32)
TARGET_ARCH=openrisc
TARGET_BASE_ARCH=openrisc
@@ -4288,6 +4291,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
echo "CONFIG_MIPS_DIS=y" >> $config_target_mak
echo "CONFIG_MIPS_DIS=y" >> config-all-disas.mak
;;
+ moxie*)
+ echo "CONFIG_MOXIE_DIS=y" >> $config_target_mak
+ echo "CONFIG_MOXIE_DIS=y" >> config-all-disas.mak
+ ;;
or32)
echo "CONFIG_OPENRISC_DIS=y" >> $config_target_mak
echo "CONFIG_OPENRISC_DIS=y" >> config-all-disas.mak
diff --git a/cpu-exec.c b/cpu-exec.c
index 94fedc5805..b87c1c07c6 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -240,6 +240,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@@ -692,6 +693,7 @@ int cpu_exec(CPUArchState *env)
| env->cc_dest | (env->cc_x << 4);
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
+#elif defined(TARGET_MOXIE)
#elif defined(TARGET_OPENRISC)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)
diff --git a/default-configs/moxie-softmmu.mak b/default-configs/moxie-softmmu.mak
new file mode 100644
index 0000000000..8ede8d5b23
--- /dev/null
+++ b/default-configs/moxie-softmmu.mak
@@ -0,0 +1 @@
+# Default configuration for moxie-softmmu
diff --git a/qapi-schema.json b/qapi-schema.json
index fdaa9da133..088f4e150f 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -2994,9 +2994,9 @@
##
{ 'enum': 'TargetType',
'data': [ 'alpha', 'arm', 'cris', 'i386', 'lm32', 'm68k', 'microblazeel',
- 'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'or32',
- 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4', 'sparc64',
- 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
+ 'microblaze', 'mips64el', 'mips64', 'mipsel', 'mips', 'moxie',
+ 'or32', 'ppc64', 'ppcemb', 'ppc', 's390x', 'sh4eb', 'sh4',
+ 'sparc64', 'sparc', 'unicore32', 'x86_64', 'xtensaeb', 'xtensa' ] }
##
# @TargetInfo: