diff options
author | Andreas Färber <afaerber@suse.de> | 2012-05-14 01:05:40 +0200 |
---|---|---|
committer | Andreas Färber <afaerber@suse.de> | 2012-06-11 00:23:04 +0200 |
commit | 5d309320e3e419187b48b4537d403daf95835bc6 (patch) | |
tree | b0b854173fdf1897e6030328bbf1bfddbe10ab2c | |
parent | 9543b0cdd64ac0ba109b92eaf00e458b6223a6a8 (diff) |
arm_boot: Pass ARMCPU to arm_boot_info::secondary_cpu_reset_hook()
Adapt highbank accordingly.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | hw/arm-misc.h | 2 | ||||
-rw-r--r-- | hw/arm_boot.c | 6 | ||||
-rw-r--r-- | hw/highbank.c | 4 |
3 files changed, 8 insertions, 4 deletions
diff --git a/hw/arm-misc.h b/hw/arm-misc.h index 320033dba5..bbd6fd357c 100644 --- a/hw/arm-misc.h +++ b/hw/arm-misc.h @@ -52,7 +52,7 @@ struct arm_boot_info { */ void (*write_secondary_boot)(ARMCPU *cpu, const struct arm_boot_info *info); - void (*secondary_cpu_reset_hook)(CPUARMState *env, + void (*secondary_cpu_reset_hook)(ARMCPU *cpu, const struct arm_boot_info *info); /* Used internally by arm_boot.c */ int is_linux; diff --git a/hw/arm_boot.c b/hw/arm_boot.c index 4955f019a8..8eabfb204f 100644 --- a/hw/arm_boot.c +++ b/hw/arm_boot.c @@ -72,9 +72,11 @@ static void default_write_secondary(ARMCPU *cpu, info->smp_loader_start); } -static void default_reset_secondary(CPUARMState *env, +static void default_reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info) { + CPUARMState *env = &cpu->env; + stl_phys_notdirty(info->smp_bootreg_addr, 0); env->regs[15] = info->smp_loader_start; } @@ -295,7 +297,7 @@ static void do_cpu_reset(void *opaque) } } } else { - info->secondary_cpu_reset_hook(env, info); + info->secondary_cpu_reset_hook(cpu, info); } } } diff --git a/hw/highbank.c b/hw/highbank.c index 45ca1ad757..66ff042cd8 100644 --- a/hw/highbank.c +++ b/hw/highbank.c @@ -60,8 +60,10 @@ static void hb_write_secondary(ARMCPU *cpu, const struct arm_boot_info *info) rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot), SMP_BOOT_ADDR); } -static void hb_reset_secondary(CPUARMState *env, const struct arm_boot_info *info) +static void hb_reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info) { + CPUARMState *env = &cpu->env; + switch (info->nb_cpus) { case 4: stl_phys_notdirty(SMP_BOOT_REG + 0x30, 0); |